The present invention relates to a semiconductor memory device and, more particularly, to a method of fabricating a DRAM cell capacitor with high capacitance and a structure thereof.
As conventional semiconductor devices generally tend towards high chip-density, the areas occupied by the semiconductor device are reduced more and more. Accordingly, in manufacturing a DRAM cell which is comprised of one transistor and one capacitor, it is very important to increase the capacitance within a limited area.
Referring to FIGS. 1A to 1C, the manufacturing process of a conventional cylindrical capacitor is illustrated, which is disclosed in "Symposium On VLSI Technology", pp 13-14, published in 1990. In FIG. 1A, field oxide layer 4, gate 6, bit line 8, interlayer insulating layer 10 are formed on a semiconductor substrate 2 of a first conduction type. Polyimide 12 is spin-coated on the substrate 2 and thereby a reverse pattern of storage electrode is formed.
In FIG. 1B, polysilicon is deposited over the entire substrate 2 by CVD (Chemical Vapor Deposition) method to form a first conduction layer 14. Thereafter, photoresist 16 is covered over the surface of the first conduction layer 14 and then an etch-back process is performed until the first conduction layer 14 disposed on top of the polyimide 12 is exposed.
In FIG. 1C, exposed portions of the first conduction layer 14, photoresist 16 and polyimide 12 are consecutively removed so as to form a cylindrical storage electrode 18. Then, insulating layer 20 of Ta.sub.2 O.sub.5 and plate electrode 22 of tungsten are formed on the substrate 2 to complete manufacturing of the capacitor. As disclosed above, in a conventional cylindrical capacitor, both ends of the storage electrode extend upwardly, perpendicular to the substrate so that the capacitor may be largely increased in capacitance.
It is, however, a drawback that the polyimide used as a scarifying layer for forming the storage electrode pattern may be weak in heat. Therefore, there is a problem in that the polyimide can be transformed or contaminated in a high temperature at which the polysilicon layer is deposited. Moreover, increasing the capacitance is limited, because only a single concave area is formed in the capacitor.